Harte is currently working on the IMSAI Series Two. He is designing architecture, the processor and
I/O boards for the IMSAI Series Two. The processor
board (MPU-C) consists of a Zilog
Z8S180 microprocessor running at 20MHz, programmable
interrupt controller, 1MB of static RAM, a 128K FLASH device,
and provision for a standard JEDEC compatible
EPROM. The MPU-C interfaces to an IEEE-696
compliant backplane via a custom designed localbus to IEEE-696
bridge implemented in a Lattice
Semiconductor M4A5-256/128 CPLD.
The IMSAI Series Two
I/O board utilizes an SMC Super-I/O chip to provide two serial
ports, a parallel port, keyboard and mouse ports, as well as
floppy disk support. External logic is used to support
two independent IDE channels, and adapts the standard IDE
interface to the 8-bit IEEE-696 bus. The full text of
specification can be downloaded here.
The Super I/O Controller is a
single-board solution to your S-100 peripheral woes.
This board allows modern peripherals to be used with your
vintage S-100 system.
I designed the architecture for the Super-I/O controller,
created the schematics, and did the board layout. 95% of
the Super-I/O controller was routed manually to allow this
design to fit on a double-sided PC board.
processor board utilizes the Zilog Z8S180 microprocessor and
provides a complete system on an IEEE-696 compatible S-100
consists of the following on-board subsystems:
·Microprocessor – Zilog Z8S180 CPU
·Memory Subsystem (SRAM, FLASH, EPROM)
·IEEE-696 and to Z8S180 Localbus Bridge
·Priority Interrupt Controller Subsystem
·Temporary Master Access (TMA) Subsystem
·Voltage Regulator Subsystem
·In-Circuit-Programming interface for
programmable logic components.
Technologies is responsible for all phases of the development
of the MPU-C processor board.
IMSAI EXP-9/AT Backplane:
The IMSAI Series Two utilizes the
IMSAI EXP-9/AT backplane designed with active termination and
interleaved ground planes between lines, thus allowing S-100
boards to operate at 10 MHz. or higher.The IMSAI Series Two comes with a nine-slot active
termination S-100 backplane standard (first slot reserved for
the front panel.) A 20-slot EXP-20/AT backplane is optional.Please note that using the 20-slot backplane precludes
mounting an ATX motherboard inside the enclosure.
The backplane is constructed of a sturdy 0.093” thick
FR-4 laminate printed-circuit board and utilizes press-fit
is supplied to the backplane via seven ¼” spade terminals.The backplane includes a header for connecting an
external system reset switch if desired.Two test points are provided toward the front of the
backplane to aid in measuring and adjusting the termination
EXP-9/AT backplane was jointly designed by Tom Fischer and I,
and I did the layout for this board. The prototype
boards (constructed of 0.063 FR-4 laminate without silk screen
or solder mask) are a perfect mechanical fit for the chassis,
and are fully functional. The artwork for the production
boards has changed slightly to include additional test points,
a RESET# connector, and power indicator LEDs for the +8, +16,
and -16V supplies.
The IMSAI Series Two uses the IMSAI S2 Monitor, which is a
direct descendent of the original IMSAI MPU-B 2K
monitor. This is the defalt bootstrap for the Series
Two. The source code for this monitor was obtained from
original source listings, and I modified it in a few hours to
work with the IMSAI Series Two system. More work is
needed to provide monitor support for some of the more
advanced features of the Series Two, such as the FLASH memory
programming, the IDE controller, modern floppy disk formats.
More to come:
The IMSAI Series Two is designed to support various 8-bit
operating systems including: Digital Research CP/M 2.2 and
CP/M 3.0 (CP/M-PLUS) and ZSDOS.
Check out the original IMSAI 8080 on my Computer